I C Interface
Control of this device is carried out via the I C bus. This device will be connected to this bus as a slave device under the
This device shall be compliant with I C-Bus Specification , document number: 9398 393 40011. As an I C compatible
device, this device has a 7-bit serial address and supports I C protocols. This device shall support standard and fast
used to support slower data speeds than specified by I C standards. This device does not contain 50nsec spike
suppression as required by fast mode operation in the I C- Bus Specification, “Table 4 Characteristics of the SDA and
SCL I/O stages for F/S-mode I C- bus devices”.
The purpose of this priority is to not keep the master waiting and the I C bus engaged for longer than necessary.
I C Pull-up Resistors
Pull-up resistors are placed on the two I C bus lines. Typically these resistors are off-chip, but, to conserve board space
HMC5843
Power on Reset
Power on reset (POR) circuit shall return the device to the power-on default state. All registers shall be returned to their
default values. Circuitry shall return to it default state, such as, but not limited to: MUX channel, ADC state machine, and
bias current.
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control of a master device, such as the processor.
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modes, 100kHz and 400kHz respectively, but cannot support the high speed mode (Hs). External pull-up resistors are
required to support these standard and fast speed modes. Depending on the application, the internal pull-ups may be
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Activities required by the master (register read and write) have priority over internal activities, such as the measurement.
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in specific low clock speed applications, they are internal to this device.
Internal Clock
The device has an internal clock for internal digital logic functions and timing management.
H-Bridge for Set/Reset Strap Drive
The ASIC contains large switching FETs capable of delivering a large but brief pulse to the Set / Reset strap of the
sensor. This strap is largely a resistive load.
Charge Current Limit
The current that reservoir capacitor (C1) can draw when charging is limited. When using dual supplies this device shall
limit the current drawn from DVDD source to charge this capacitor. When only a single supply is used, Pin DVDD is
externally tied to pin C1. In this configuration, current is still limited. For example, the internal voltage regulator will limit
this current draw.
Bias Current Generator
The bias current generator is used to apply a bias current to the offset strap of the magneto-resistive sensor, which
creates an artificial magnetic field bias on the sensor. This function is enabled and the polarity is set by bits MS[n] in the
configuration register. The bias current generator generates dc current supplied from the AVDD supply.
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